Device Boot Flow - Texas Instruments Concerto F28M35 Series Technical Reference Manual

Device Boot Flow Diagram
6.4 Device Boot Flow Diagram
Figure 6-1 shows the device boot flow for the master, control, and analog subsystems on power-up or
after an external reset input.
M-Boot ROM start
Device initialization
Master subsystem
initialization
Reset cause handling
CRESCNF[M3RSnIN] =1;
CRESCNF[ACIBRESETn] =1;
Master subsystem
WIR mode handling
Read Boot Mode GPIO
Master subsystem
boot as per boot mode
540
ROM Code and Peripheral Booting
Figure 6-1. Device Boot Flow
Reset: POR/XRSn
Control subsystem is
held in reset
C-Boot ROM start
Control subsystem
POR/XRSn
initialization
Control subsystem
WIR mode handling
Enter IDLE mode
Copyright © 2012–2019, Texas Instruments Incorporated
Wakeup on IPC Interrupt
POR/XRSn
SPRUH22I – April 2012 – Revised November 2019
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Analog subsystem is
held in reset
ACIB and Analog
subsystem is out
of reset
ACIB interface ready
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