Gpio Port C Set, Clear And Toggle (Gpcset, Gpcclear, Gpctoggle) Registers; Gpio Port C Set (Gpcset) Register Field Descriptions; Gpio Port C Clear (Gpcclear) Register Field Descriptions; Gpio Port C Toggle (Gpctoggle) Register Field Descriptions - Texas Instruments Concerto F28M35 Series Technical Reference Manual

C28 General-Purpose Input/Output (GPIO)

4.2.7.32 GPIO Port C Set, Clear and Toggle (GPCSET, GPCCLEAR, GPCTOGGLE) Registers

The GPIO Port C Set, Clear and Toggle (GPCSET, GPCCLEAR, GPCTOGGLE) registers are shown and
described in the figure and table below.
Figure 4-73. GPIO Port C Set, Clear and Toggle (GPCSET, GPCCLEAR, GPCTOGGLE) Registers
31
23
15
7 6
GPIO71 GPIO70
R/W-x R/W-x
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 4-85. GPIO Port C Set (GPCSET) Register Field Descriptions
Bits Field
31-8 Reserved
7-4 GPIO71-GPIO68
3-0 Reserved
Table 4-86. GPIO Port C Clear (GPCCLEAR) Register Field Descriptions
Bits Field
31-8 Reserved
7-4 GPIO71 -GPIO68
3-0 Reserved
Table 4-87. GPIO Port C Toggle (GPCTOGGLE) Register Field Descriptions
Bits Field
31-8 Reserved
7-4 GPIO71 -GPIO68
3-0 Reserved
420
General-Purpose Input/Output (GPIO)
Reserved
Reserved
Reserved
5 4
GPIO69 GPIO68
R/W-x R/W-x
Valu
e
Any writes to these bit(s) must always have a value of 0.
Each GPIO port C pin (GPIO68-GPIO71) corresponds to one bit in this register.
0 Writes of 0 are ignored. This register always reads back a 0.
1 Writing a 1 forces the respective output data latch to high. If the pin is configured as a GPIO
output then it will be driven high. If the pin is not configured as a GPIO output then the latch is
set but the pin is not driven.
Any writes to these bit(s) must always have a value of 0.
Value
Any writes to these bit(s) must always have a value of 0.
Each GPIO port C pin (GPIO68-GPIO71) corresponds to one bit in this register.
0 Writes of 0 are ignored. This register always reads back a 0.
1 Writing a 1 forces the respective output data latch to low. If the pin is configured as a GPIO
output then it will be driven low. If the pin is not configured as a GPIO output then the latch is
cleared but the pin is not driven.
Any writes to these bit(s) must always have a value of 0.
Value
Any writes to these bit(s) must always have a value of 0.
Each GPIO port C pin (GPIO68-GPIO71) corresponds to one bit in this register.
0 Writes of 0 are ignored. This register always reads back a 0.
1 Writing a 1 forces the respective output data latch to toggle from its current state. If the pin is
configured as a GPIO output then it will be driven in the opposite direction of its current state. If
the pin is not configured as a GPIO output then the latch is cleared but the pin is not driven.
Any writes to these bit(s) must always have a value of 0.
Copyright © 2012–2019, Texas Instruments Incorporated
R-0
R-0
R-0
3
Description
Description
Description
SPRUH22I – April 2012 – Revised November 2019
www.ti.com
24
16
8
0
Reserved
R-0
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