Gpio Commit (Gpiocr) Register; Gpio Analog Mode Select (Gpioamsel) Register; Gpio Commit (Gpiocr) Register Field Descriptions; Gpio Analog Mode Select (Gpioamsel) Register Field Descriptions - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

4.1.6.16 GPIO Analog Mode Select (GPIOAMSEL) Register, offset 0x528

The GPIOAMSEL register selects the analog function of a pin. The appropriate bits need to be set to

enable the USB0VBUS and USB0ID signals for USB0 to function correctly.

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 4-21. GPIO Analog Mode Select (GPIOAMSEL) Register Field Descriptions

SPRUH22I – April 2012 – Revised November 2019

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Figure 4-18. GPIO Commit (GPIOCR) Register

Table 4-20. GPIO Commit (GPIOCR) Register Field Descriptions

The corresponding GPIOAFSEL, GPIOPUR, GPIOCSEL, or GPIODEN bits cannot be written.

The corresponding GPIOAFSEL, GPIOPUR, GPIOCSEL, or GPIODEN bits can be written.

Note: The default register type for the GPIOCR register is RO for all GPIO pins with the exception

of the NMI pin, PB7. This pin is currently the only GPIO that is protected by the GPIOCR register.

Because of this, the register type for GPIO Port B7 is R/W.

The default reset value for the GPIOCR register is 0x0000.00FF for all GPIO pins, with the

exception of the NMI pin, PB7. To ensure that the NMI pin is not accidentally programmed as the

non-maskable interrupt pin, it defaults to non-committable. Because of this, the default reset value

of GPIOCR for GPIO Port B is 0x0000.007F.

Figure 4-19. GPIO Analog Mode Select (GPIOAMSEL) Register

GPIO Analog Mode Select

The analog function of the pin is disabled and the pin is capable of digital functions as specified by

the other GPIO configuration registers.

The analog function of the pin is enabled.

General-Purpose Input/Output (GPIO)

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