Gpio Peripheral Identification 7 (Gpioperiphid7) Register; Gpio Peripheral Identification 7 (Gpioperiphid7) Register Field Descriptions - Texas Instruments Concerto F28M35 Series Technical Reference Manual

General-Purpose Input/Output (GPIO)
4.1.6.23 GPIO Peripheral Identification 7 (GPIOPeriphID7) Register, offset 0xFDC
The GPIOPeriphID4, GPIOPeriphID5, GPIOPeriphID6, and GPIOPeriphID7 registers can conceptually be
treated as one 32-bit register; each register contains eight bits of the 32-bit register, used by software to
identify the peripheral.
Figure 4-26. GPIO Peripheral Identification 7 (GPIOPeriphID7) Register
31
15
Reserved
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 4-28. GPIO Peripheral Identification 7 (GPIOPeriphID7) Register Field Descriptions
Bit Field
31-8 Reserved
7-0 PID7
364
General-Purpose Input/Output (GPIO)
R-0
Value Description
Reserved
GPIO Peripheral ID Register [31:24]
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Reserved
R-0
8 7
SPRUH22I – April 2012 – Revised November 2019
www.ti.com
PID7
R-0
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16
0