16-Bit Input Edge-Time Mode Example - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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Functional Description
2.3.2.4
Input Edge-Time Mode
NOTE: For rising-edge detection, the input signal must be High for at least two system clock periods
following the rising edge. Similarly, for falling edge detection, the input signal must be low for
at least two system clock periods following the falling edge. Based on this criteria, the
maximum input frequency for edge detection is 1/4 of the system frequency.
The prescaler is not available in 16-Bit Input edge-time mode.
In edge-time mode, the timer is configured as a 16-bit down-counter. In this mode, the timer is initialized to
the value loaded in the GPTMTnILRregister. The timer is capable of capturing three types of events: rising
edge, falling edge, or both. The timer is placed into edge-time mode by setting the TnCMR bit in the
GPTMTnMR register, and the type of event that the timer captures is determined by the TnEVENT fields
of the GPTMCTL register.
When software writes the TnEN bit in the GPTMCTL register, the timer is enabled for event capture. When
the selected input event is detected, the current timer counter value is captured in the GPTMTnR register
and is available to be read by the microcontroller. The GPTM then asserts the CnERIS bit (and the
CnEMIS bit, if the interrupt is not masked). The GPTMTnV contains the free-running value of the timer and
can be read to determine the time that elapsed between the interrupt assertion and the entry into the ISR.
In addition to generating interrupts, a µDMA trigger can be generated. The µDMA trigger is enabled by
configuring and enabling the appropriate µDMA channel. See Channel Configuration in the Micro Direct
Memory Access (µDMA) chapter.
After an event has been captured, the timer does not stop counting. It continues to count until the TnEN
bit is cleared. When the timer reaches the timeout value, it is reloaded with the value from the
GPTMTnILR register.
Figure 2-4
shows how input edge timing mode works. In the diagram, it is assumed that the start value of
the timer is the default value of 0xFFFF, and the timer is configured to capture rising edge events.
Each time a rising edge event is detected, the current count value is loaded into the GPTMTnR register,
and is held there until another rising edge is detected (at which point the new count value is loaded into
the GPTMTnR register).
0xFFFF
Input Signal
2.3.2.5
PWM Mode
NOTE: The prescaler is not available in 16-Bit PWM mode.
304
M3 General-Purpose Timers
Figure 2-4. 16-Bit Input Edge-Time Mode Example
Count
GPTMTnR=X
Z
X
Y
Copyright © 2012–2019, Texas Instruments Incorporated
GPTMTnR=Y
GPTMTnR=Z
Time
SPRUH22I – April 2012 – Revised November 2019
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