Sci Initialization (Clocked Synchronous Mode) - Renesas H8S/2100 Series Hardware Manual

Section 15 Serial Communication Interface (SCI)
15.6.2

SCI Initialization (Clocked Synchronous Mode)

Before transmitting and receiving data, you should first clear the TE and RE bits in SCR to 0, then
initialize the SCI as described in a sample flowchart in figure 15.15. When the operating mode,
transfer format, etc., is changed, the TE and RE bits must be cleared to 0 before making the
change using the following procedure. When the TE bit is cleared to 0, the TDRE flag in SSR is
set to 1. However, clearing the RE bit to 0 does not initialize the RDRF, PER, FER, and ORER
flags in SSR, or RDR.
Clear TE and RE bits in SCR to 0
Set data transfer format in
Set CKE1 and CKE0 bits in SCR
(TE and RE bits are 0)
Set value in BRR
1-bit interval elapsed?
Set TE and RE bits in SCR to 1,
andset RIE, TIE, TEIE,
Note: In simultaneous transmit and receive operations, the TE and RE bits should
both be cleared to 0 or set to 1 simultaneously.
Rev. 1.00 Apr. 28, 2008 Page 442 of 994
REJ09B0452-0100
Start initialization
SMR and SCMR
Wait
No
Yes
and MPIE bits
<Transfer start>
Figure 15.15 Sample SCI Initialization Flowchart
[1] Set the data transfer format in SMR
and SCMR.
[2] Set the clock selection in SCR. Be
sure to clear bits RIE, TIE, TEIE,
MPIE, TE, and RE to 0.
[1]
[3] Write a value corresponding to the bit
rate to BRR. This step is not
necessary if an external clock is used.
[2]
[4] Wait at least one bit interval, then set
the TE bit or RE bit in SCR to 1.
Also set the RIE, TIE, TEIE, and MPIE
bits.
[3]
Setting the TE and RE bits enables the
TxD and RxD pins to be used.
[4]