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ST STM32L4+ Series Reference Manual page 1567

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RM0432
46.6.3
RTC control register (RTC_CR)
Address offset: 0x08
Backup domain reset value: 0x0000 0000
System reset: not affected
31
30
29
Res.
Res.
Res.
Res.
15
14
13
TSIE
WUTIE ALRBIE ALRAIE
rw
rw
rw
Bits 31:25 Reserved, must be kept at reset value.
Bit 24 ITSE: timestamp on internal event enable
Bit 23 COE: Calibration output enable
This bit enables the RTC_CALIB output
Bits 22:21 OSEL[1:0]: Output selection
These bits are used to select the flag to be routed to RTC_ALARM output
Bit 20 POL: Output polarity
This bit is used to configure the polarity of RTC_ALARM output
Bit 19 COSEL: Calibration output selection
When COE=1, this bit selects which signal is output on RTC_CALIB.
These frequencies are valid for RTCCLK at 32.768 kHz and prescalers at their default values
(PREDIV_A=127 and PREDIV_S=255). Refer to
Bit 18 BKP: Backup
This bit can be written by the user to memorize whether the daylight saving time change has
been performed or not.
Real-time clock (RTC) applied to STM32L4Rxxx and STM32L4Sxxx only
28
27
26
25
Res.
Res.
Res.
12
11
10
9
TSE
WUTE ALRBE ALRAE
rw
rw
rw
rw
0: internal event timestamp disabled
1: internal event timestamp enabled
0: Calibration output disabled
1: Calibration output enabled
00: Output disabled
01: Alarm A output enabled
10: Alarm B output enabled
11: Wakeup output enabled
0: The pin is high when ALRAF/ALRBF/WUTF is asserted (depending on OSEL[1:0])
1: The pin is low when ALRAF/ALRBF/WUTF is asserted (depending on OSEL[1:0]).
0: Calibration output is 512 Hz (with default prescaler setting)
1: Calibration output is 1 Hz (with default prescaler setting)
24
23
22
21
ITSE
COE
OSEL[1:0]
rw
rw
rw
rw
8
7
6
5
BYPS
Res.
FMT
HAD
rw
rw
rw
Section 46.3.15: Calibration clock output
RM0432 Rev 6
20
19
18
POL
COSEL
BKP
rw
rw
rw
4
3
2
REFCKON TSEDGE
WUCKSEL[2:0]
rw
rw
rw
17
16
SUB1H ADD1H
w
w
1
0
rw
rw
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