Timer Start Register (Tstr) - Renesas H8SX/1500 Series Hardware Manual

9.3.8

Timer Start Register (TSTR)

TSTR starts or stops operation for channels 0 to 5. When setting the operating mode in TMDR or
setting the count clock in TCR, first stop the TCNT counter.
Bit 7
Bit Name —
Initial Value 0
R/W R/W
Bit Bit Name

7, 6
5 CST5
4 CST4
3 CST3
2 CST2
1 CST1
0 CST0
6 5
— CST5
0 0
R/W R/W
Initial
value R/W Description
All 0 R/W Reserved
These bits are always read as 0. The write value should
always be 0.
0 R/W Counter Start 5 to 0
0 R/W These bits select operation or stoppage for TCNT.
0 R/W If 0 is written to the CST bit during operation with the
TIOC pin designated for output, the counter stops but the
0 R/W
TIOC pin output compare output level is retained. If TIOR
0 R/W
is written to when the CST bit is cleared to 0, the pin
output level will be changed to the set initial output value.
0 R/W
0: TCNT_5 to TCNT_0 count operation is stopped
1: TCNT_5 to TCNT_0 performs count operation
Section 9 16-Bit Timer Pulse Unit (TPU)
4 3
CST4 CST3
0 0
R/W R/W
Rev. 3.00 Mar. 14, 2006 Page 297 of 804
2 1
CST2 CST1
0 0
R/W R/W
REJ09B0104-0300
0
CST0
0
R/W