Uarti Transmit/Receive Mode Register (Uimr) (I = 0 To 2, 5 To 7) - Renesas M16C/64C User Manual

M16C/64C Group
23.2.2

UARTi Transmit/Receive Mode Register (UiMR) (i = 0 to 2, 5 to 7)

UARTi Transmit/Receive Mode Register (i = 0 to 2, 5 to 7)
b7 b6 b5 b4 b3 b2 b1
SMD2 to SMD0 (Serial I/O mode select bit) (b2 to b0)
When setting bits SMD2 to SMD0 to 000b (serial interface disabled), set the TE bit in the UiC1 register
to 0 (transmission disabled) and the RE bit to 0 (reception disabled).
2
When using I C mode, set the IICM bit in the UiSMR register to 1 (I
SMD0 to 010b (I 2 C mode).
R01UH0092EJ0110 Rev.1.10
Jul 31, 2012
Symbol
b0
U0MR, U1MR, U2MR
U5MR, U6MR, U7MR
Bit Symbol Bit Name
SMD0
SMD1 Serial I/O mode select bit
SMD2
Internal/external clock
CKDIR
select bit
STPS Stop bit length select bit
PRY Odd/even parity select bit
PRYE Parity enable bit
TXD, RXD I/O polarity
IOPOL
inverse bit
23. Serial Interface UARTi (i = 0 to 2, 5 to 7)
Address
0248h, 0258h, 0268h
0288h, 0298h, 02A8h
Function
b2 b1 b0
0 0 0 : Serial interface disabled
0 0 1 : Clock synchronous serial I/O mode
2
0 1 0 : I C mode
1 0 0 : UART mode character bit length is 7 bits
1 0 1 : UART mode character bit length is 8 bits
1 1 0 : UART mode character bit length is 9 bits
Only set the values listed above.
0 : Internal clock
1 : External clock
0 : 1 stop bit
1 : 2 stop bit
Enabled when PRYE is 1
0 : Odd parity
1 : Even parity
0 : Parity disabled
1 : Parity enabled
0 : Not inverted
1 : Inverted
2
C mode), then set bits SMD2 to
Reset Value
00h
00h
RW
RW
RW
RW
RW
RW
RW
RW
RW
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