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5.1
Overview
This LSI has nine modes of operation after a reset. These include eight power-down modes, in
which power dissipation is significantly reduced. Table 5.1 gives a summary of the nine operating
modes.
Table 5.1
Operating Modes
Operating Mode
Active (high-speed) mode
Active (medium-speed) mode
Subactive mode
Sleep (high-speed) mode
Sleep (medium-speed) mode
Subsleep mode
Watch mode
Standby mode
Module standby mode
Of these nine operating modes, all but the active (high-speed) mode are power-down modes. In
this section the two active modes (high-speed and medium speed) will be referred to collectively
as active mode.
Figure 5.1 shows the transitions among these operation modes. Table 5.2 indicates the internal
states in each mode.
Section 5 Power-Down Modes
Description
The CPU and all on-chip peripheral functions are operable on the
system clock in high-speed operation
The CPU and all on-chip peripheral functions are operable on the
system clock in low-speed operation
The CPU is operable on the subclock in low-speed operation
The CPU halts. On-chip peripheral functions are operable on the
system clock
The CPU halts. On-chip peripheral functions operate at a
frequency of 1/64, 1/32, 1/16, or 1/8 of the system clock frequency
The CPU halts. The time-base function of timer A, timer C, timer
G, timer F, WDT, SCI1, SCI3-1, SCI3-2, AEC, and LCD
controller/driver are operable on the subclock.
The CPU halts. The time-base function of timer A, timer F, timer
G, AEC, and LCD controller/driver are operable on the subclock.
The CPU and all on-chip peripheral functions halt
Individual on-chip peripheral functions specified by software enter
standby mode and halt
Section 5 Power-Down Modes
Rev. 6.00 Aug 04, 2006 page 131 of 680
REJ09B0145-0600
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