Chapter 6 Stbc; Power Save Function; Power Save Function State Transition Diagram - Renesas NU85E Preliminary User's Manual

32-bit microprocessor core
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The standby control unit (STBC) implements the various power save functions of the NU85E by controlling the
external clock generator (CG).

6.1 Power Save Function

The power save function has the following three modes.
(1) HALT mode
This mode, which stops the supply of clocks only to the CPU, is set by executing a special-purpose instruction
(HALT instruction). Since the supply of clocks to internal units other than the CPU continues, operation of the
NU85E internal peripheral I/O that do not depend on the CPU instruction processing continues. The power
consumption of the overall system can be reduced by intermittent operation that is achieved due to a
combination of HALT mode and normal operation mode.
(2) Software STOP mode
This mode, which stops the overall system by stopping the external clock generator, is set by means of a PSC
register setting. The system enters an ultra-low power consumption state in which only leak current is lost.
(3) Hardware STOP mode
This mode, which stops the overall system by stopping the external clock generator, is set by inputting the
DCSTOPZ signal. The system enters an ultra-low power consumption state in which only leak current is lost.
Software STOP
mode
Remarks 1. n = 2 to 0 m = 63 to 0
2. L: low-level input H: high-level input
136

CHAPTER 6 STBC

Figure 6-1. Power Save Function State Transition Diagram
Set software STOP
mode
(Set PSC register)
Normal operation
Input DCRESZ,
DCNMIn, and INTm
Input DCSTOPZ (L)
Input DCSTOPZ (L)
Hardware STOP
Preliminary User's Manual A14874EJ3V0UM
Set HALT mode
(Execute HALT
instruction)
mode
Input DCRESZ,
DCNMIn, and INTm
Input DCSTOPZ (H)
and DCRESZ
Input DCSTOPZ (L)
mode
Input DCSTOPZ (H)
HALT mode

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