Table 332. Tamp Input/Output Pins; Table 333. Tamp Internal Input/Output Signals; Table 334. Tamp Interconnection - ST STM32G4 Series Reference Manual

RM0440
35.3.2 TAMP pins and internal signals
TAMP_INx (x = pin index)
Internal signal name
tamp_ker_ck
tamp_pclk
tamp_itamp[y]
(y = signal index)
tamp_evt
tamp_erase
tamp_it
tamp_trg[x]
(x = signal index)
The TAMP kernel clock is usually the LSE at 32.768 kHz although it is possible to select
other clock sources in the RCC (refer to RCC for more details). Some detections modes are
not available in some low-power modes or V
Section 35.4: TAMP low-power modes
Signal name
tamp_evt
tamp_erase
tamp_itamp3
tamp_itamp4
tamp_itamp5
tamp_itamp6
35.3.3 TAMP register write protection
After system reset, the TAMP registers (including backup registers) are protected against
parasitic write access by the DBP bit in the power control peripheral (refer to the PWR
power control section). DBP bit must be set in order to enable TAMP registers write access.

Table 332. TAMP input/output pins

Pin name
Input

Table 333. TAMP internal input/output signals

Signal type
Input
Input
Inputs
Output
Output
Output
Output

Table 334. TAMP interconnection

rtc_tamp_evt used to generate a timestamp event
The tamp_erase signal is used to erase the device secrets listed
hereafter: backup registers
LSE monitoring
HSE monitoring
RTC calendar overflow (rtc_calovf)
ST manufacturer readout
RM0440 Rev 1
Tamper and backup registers (TAMP)
Signal type
Tamper input pin
TAMP kernel clock, connected to rtc_ker_ck
and also named RTCCLK in this document
TAMP APB clock, connected to rtc_pclk
Internal tamper event sources
Tamper event detection (internal or external)
The tamp_evt is used to generate a RTC
timestamp event
Device secrets erase request following tamper
event detection (internal or external)
TAMP interrupt (refer to
interrupts
Tamper detection trigger
when the selected clock is not LSE (refer to
BAT
for more details.
Source/Destination
Description
Description
Section 35.5: TAMP
for details)
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