Figure 562. Mute Mode Using Address Mark Detection - ST STM32G4 Series Reference Manual

Low-power universal asynchronous receiver transmitter (LPUART)
bit/7-bit word is compared by the receiver with its own address which is programmed in the
ADD bits in the LPUART_CR2 register.
Note: In 7-bit and 9-bit data modes, address detection is done on 6-bit and 8-bit addresses
(ADD[5:0] and ADD[7:0]) respectively.
The LPUART enters Mute mode when an address character is received which does not
match its programmed address. In this case, the RWU bit is set by hardware. The RXNE
flag is not set for this address byte and no interrupt or DMA request is issued when the
LPUART enters Mute mode.
The LPUART also enters Mute mode when the MMRQ bit is written to '1'. The RWU bit is
also automatically set in this case.
The LPUART exits from Mute mode when an address character is received which matches
the programmed address. Then the RWU bit is cleared and subsequent bytes are received
normally. The RXNE/RXFNE bit is set for the address character since the RWU bit has been
cleared.
Note: When FIFO management is enabled, when MMRQ bit is set while the receiver is sampling
the last bit of a data, this data may be received before effectively entering in Mute mode.
An example of Mute mode behavior using address mark detection is given in
In this example, the current address of the receiver is 1
(programmed in the LUART_CR2 register)
RX
RWU
37.3.10 LPUART parity control
Parity control (generation of parity bit in transmission and parity checking in reception) can
be enabled by setting the PCE bit in the LPUART_CR1 register. Depending on the frame
length defined by the M bits, the possible LPUART frame formats are as listed in
M bits
00
00
01
01
1656/2083

Figure 562. Mute mode using address mark detection

IDLE Addr=0 Data 1 Data 2
MMRQ written to 1
(RXNE was cleared)
Non-matching address
Table 348: LPUART frame formats
PCE bit
0
1
0
1
IDLE Addr=1 Data 3 Data 4 Addr=2 Data 5
Mute mode
Matching address
| SB | 7-bit data | PB | STB |
| SB | 8-bit data PB | STB |
RM0440 Rev 1
RXNE RXNE RXNE
Normal mode
Non-matching address
(1)
LPUART frame
| SB | 8 bit data | STB |
| SB | 9-bit data | STB |
RM0440
Figure 562.
Mute mode
MSv31888V1
Table 348.