Samsung S3C2451X User Manual page 83

Risc microprocessor
Table of Contents

Advertisement

S3C2451X RISC MICROPROCESSOR
ARM Down Req. & Ack.
ARMCLK
BUS Down Req. & Ack.
DRAM Self Refresh
Req. & Ack.
CKE (DRAM)
SYSCLK
PWR_EN
Figure 2-12. Entering SLEEP mode and exiting SLEEP mode (wake-up)
SLEEP mode is initiated
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
SYSTEM CONTROLLER
Wake-up event
2-17

Advertisement

Chapters

Table of Contents
loading

Table of Contents