Pcm1_Sdo; Pcm1_Sdi; Pcm1_Cdclk; Pcm1_Sclk - Samsung S3C2451X User Manual

S3C2451X RISC MICROPROCESSOR
PORT L CONTROL REGISTERS (GPLCON, GPLDAT, GPLUDP,GPLSEL) (Continued)
GPLDAT
Reserved
GPL[14:0]
GPLUDP
Reserved
GPLUDP14
~
GPLUDP0
GPLSEL
Reserved
GPL7SEL
GPL6SEL
GPL5SEL
GPL4SEL
Bit
[31:15] Reserved
[14:0] When the port is configured as an input port, the corresponding bit is the
pin state. When the port is configured as an output port, the pin state is the
same as the corresponding bit.
When the port is configured as functional pin, the undefined value will be
read.
Bit
[31:30] Reserved
[CPU:CPD]
[29:28]
~
00 : pull-up/down disable
[1:0]
01 : pull-down enable
10 : pull-up enable
11 : not-available
Bit
[31:4] Reserved
[3] 0 = GPL7
[2] 0 = GPL6
[1] 0 = GPL5
[0] 0 = GPL4
Description
Description
Description

1 = PCM1_SDO

1 = PCM1_SDI

1 = PCM1_CDCLK

1 = PCM1_SCLK

I/O PORTS
11-31