Samsung S3C2451X User Manual page 622

Risc microprocessor
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CAMERA INTERFACE
CODEC MAIN-SCALER CONTROL REGISTER
Register
CICOSCCTRL
0x4D80_0058
CICOSCCTRL
ScalerBypass_Co
ScaleUp_H_Co
ScaleUp_V_Co
Reserved
MainHorRatio_Co
CoScalerStart
Reserved
MainVerRatio_Co
CODEC DMA TARGET AREA REGISTER
Register
CICOTAREA
0x4D80_005C
CICOTAREA
Reserved
[31:26]
[25:0]
CICOTAREA
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
23-30
Specifications and information herein are subject to change without notice.
Address
R/W
RW
Bit
[31]
Codec scaler bypass for upper 2048 x 2048 size (In this
case, ImgCptEn_CoSC and ImgCptEn_PrSC should be 0,
but ImgCptEn should be 1. It is not allowed to capturing
preview image. This mode is intended to capture JPEG
input image for DSC application) In this case, input pixel
buffering depends on only input FIFOs, so system bus
should be not busy in this mode.
[30]
Horizontal scale up/down flag for codec scaler (In 1:1
scale ratio, this bit should be "1") 1: up, 0:down
[29]
Vertical scale up/down flag for codec scaler (In 1:1 scale
ratio, this bit should be "1") 1: up, 0:down
[28:25]
[24:16]
Horizontal scale ratio for codec main-scaler
[15]
Codec scaler start
[14:9]
[8:0]
Vertical scale ratio for codec main-scaler
Address
R/W
RW
Bit
Target area for codec DMA
= Target H size x Target V size
Description
Codec main-scaler control
Description
Description
Codec pre-scaler destination format
Description
S3C2451X RISC MICROPROCESSOR
Reset Value
Initial
State
0
0
0
0
0
0
0
0
Reset Value
Initial
State
0
0
0
Change
State
O
O
O
X
O
O
X
O
0
Change
State
X
X

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