Samsung S3C2451X User Manual page 555

S3C2451X RISC MICROPROCESSOR
8BPP display (Palette)
(BSWP = 0, HWSWP = 0)
D[31:24]
000H P1
004H P5
008H P9
...
(BSWP = 1, HWSWP = 0)
D[31:24]
000H P4
004H P8
008H P12
...
P1 P2 P3 P4
NOTE: The values of frame buffer are index of palette memory.
The MSB value of Palette memory is AEN bit.
AEN : Select Alpha value in Window 1 Alpha Value Register for alpha blending
AEN = 0 : ALPHA0_R/G/B values are applied.
AEN = 1 : ALPHA1_R/G/B values are applied.
Each pixel of LCD panel displays blended color with lower layer window.
Refer to the equation of alpha blending on page 22-22.
D[23:16]
P2
P6
P10
D[23:16]
P3
P7
P11
P5 P6 P7 P8 P9
LCD Panel
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
D[15:8] D[7:0]
P3 P4
P7 P8
P11 P12
D[15:8] D[7:0]
P2 P1
P6 P5
P10 P9
......
P10 P11 P12
LCD CONTROLLER
22-15