Samsung S3C2451X User Manual page 399

S3C2451X RISC MICROPROCESSOR
DMA TRANSFER COUNTER REGISTER (DTCR)
The byte write count register keeps the byte (half word) count value of a TX packet from MCU. The counter value
will be used to determine the end of TX packet.
Register Address
DTCR 0x4980_0044
MTCR Bit
[31:11]
DTCR [10:0]
R/W
R/W DMA Transfer Counter Register
R/W
Reserved
R/W To operate single mode transfer, DTCR is needed to be set
11'h0002. In case of Burst mode, the MCU should set max
packet value.
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
Description
USB2.0 DEVICE
Reset Value
0x0
Initial State
11'h0
17-27