Samsung S3C2451X User Manual page 340

Real Time Clock
14.6 Individual Register Descriptions
14.6.1 REAL TIME CLOCK CONTROL (RTCCON) REGISTER
The RTCCON register consists of 9 bits . It controls the read/write enable of the CLKSEL, CNTSEL and
CLKRST for testing.
RTCEN bit can control all interfaces between the CPU and the RTC, Therefore it must be set to 1 in an RTC
control routine to enable data read/write after a system reset. Before power off, the RTCEN bit is cleared to 0 to
prevent inadvertent writing into BCD counter register.
CLKRST is counter reset for 2
Before RTC clock setting, 2
Register Address
RTCCON 0x57000040
RTCCON Bit
TICsel2
[8:5]
TICsel
[4]
CLKRST
[3]
CNTSEL
[2]
CLKSEL
[1]
RTCEN
[0]
Note:
14-8
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
15
Clock divider.(reference to Figure 15-1)
15
Clock divider must be reset for exact RTC operation.
R/W
R/W
Description
Tick Time clock select2.
0 = clock period of 1/16384 second select
1 = clock period of 1/8192 second select
2 = clock period of 1/4096 second select
3 = clock period of 1/2048 second select
4 = clock period of 1/128 second select
5 = clock period of 1 second select
6 = clock period of 1/1024 second select
7 = clock period of 1/512 second select
8 = clock period of 1/256 second select
9 = clock period of 1/64 second select
10 = clock period of 1/32 second select
11 = clock period of 1/16 second select
12 = clock period of 1/8 second select
13 = clock period of 1/4 second select
14 = clock period of 1/2 second select
Tick Time clock select1.
0 = clock period select at TICsel2
1 = clock period of 1/32768 second
RTC clock count reset.
0 = No reset, 1 = Reset
BCD count select.
0 = Merge BCD counters
1 = Reserved (Separate BCD counters)
BCD clock select.
15
0 = XTAL 1/2 divided clock
1 = Reserved (XTAL clock only for test)
RTC control enable.
0 = Disable 1 = Enable
NOTE: Only BCD time count and read operation can be
performed.
Description
RTC control Register
S3C2451
RISC MICROPROCESSOR
Reset Value
0x00
Initial State
0x0
0
0
0
0
0