Samsung S3C2451X User Manual page 112

BUS PRIORITIES
Priority AHB_I BUS MASTERS
0
1
2
3 CAMIF_PREVIEW
4 CAMIF_CODEC
5
6
7
8
Priority APB BUS MASTERS
0
1
2
3
4
5
6
7
8
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
4-2
Specifications and information herein are subject to change without notice.
Reserved 1. Fix Type: all priority can be changed according to register value
stored in The System Controller.
TFTW1-LCD
TFTW2-LCD
2 Rotation Type : all masters' priority can be rotatable according to
register value stored in The System Controller.
( except for Default Master)
CAMIF_PIP
2D
AHB2AHB
Default
AHB2APB Bridge Master obtains always highest priority and the
AHB2APB
priority of six DMA channels rotate internally.
DMA0
DMA1
DMA2
DMA3
DMA4
DMA5
DMA6
DMA7
S3C2451X RISC MICROPROCESSOR
Comment
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