Samsung S3C2451X User Manual page 324

PWM TIMER
TIMER CONFIGURATION REGISTER1 (TCFG1)
Register
TCFG1 0x51000004
TCFG1
Reserved
DMA mode
MUX 4
MUX 3
MUX 2
MUX 1
MUX 0
Notice) When you use External TCLK, duty of TOUT may show slight error. External TCLK is sampled by PCLK in
PWM module. But External TCLK and PCLK is asynchronous clock. So External TCLK may not be sampled at
exact time. This slight error can be reduced when External clock is slower than PCLK. So we recommend using
External PCLK under 1MHz.
(Ex. When PCLK is 66MHz and External PCLK is 1MHz, duty or jitter error can be 1.5%. When PCLK is 66MHz
and External PCLK is 0.5MHz, duty or jitter error can be 0.75%)
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
13-12
Specifications and information herein are subject to change without notice.
Address R/W
R/W 5-MUX & DMA mode selection register
Bit
[31:24]
[23:20] Select DMA request channel
0000 = No select (all interrupt) 0001 = Timer0
0010 = Timer1
0100 = Timer3
0110 = Reserved
[19:16] Select MUX input for PWM Timer4.
0000 = 1/2
0011 = 1/16
[15:12] Select MUX input for PWM Timer3.
0000 = 1/2
0011 = 1/16
[11:8] Select MUX input for PWM Timer2.
0000 = 1/2
0011 = 1/16
[7:4] Select MUX input for PWM Timer1.
0000 = 1/2
0011 = 1/16
[3:0] Select MUX input for PWM Timer0.
0000 = 1/2
0011 = 1/16
Description
Description
0011 = Timer2
0101 = Timer4
0001 = 1/4 0010 = 1/8
01xx = External TCLK
0001 = 1/4 0010 = 1/8
01xx = External TCLK
0001 = 1/4 0010 = 1/8
01xx = External TCLK
0001 = 1/4 0010 = 1/8
01xx = External TCLK
0001 = 1/4 0010 = 1/8
01xx = External TCLK
S3C2451X RISC MICROPROCESSOR
Reset Value
0x00000000
Initial State
00000000
0000
0000
0000
0000
0000
0000