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S3C2451X RISC MICROPROCESSOR
MISCELLANEOUS CONTROL REGISTER (MISCCR)
In Sleep mode, the data bus(SD[15:0] or RD[15:0] can be set as Hi-Z and Output '0' state. But, because of the
characteristics of IO pad, the data bus pull-up/down resisters have to be turned on or off to reduce the power
consumption. SD[15:0] or RD[15:0] pin pull-up/down resisters can be controlled by MISCCR register.
Pads related USB are controlled by this register for USB host, or for USB device.
Register
MISCCR
MISCCR
HSSPI_EN2
nCD_CF
Reserved
Reserved
Reserved
FLT_I2C
Reserved
USB_DPPD
USB_DNPD
SEL_SUSPND
Reserved
CLKSEL1 *
Reserved
CLKSEL0 *
Address
R/W
0x56000080
R/W
Bit
[31]
Must be set '1'
nCD_CF Signal Register
[30]
0 : card detected
1 : card not detected
Reserved
[29]
[28]
Should be '1'
[27:25]
Reserved
[24]
Clocked Noise Filter Enable for IIC
[23:15]
Reserved
[14]
USB DP Pull-down control
0 : disable
[13]
USB DN Pull-down control
0 : disable
USB Port Suspend mode
[12]
0 = Normal mode 1 = Suspend mode
Reserved
[11]
Select source clock with CLKOUT1 pad
[10:8]
000 = RESERVED
001 = Gated EPLL output
010 = RTC clock output
011 = HCLK
100 = PCLK
101 = DCLK1(Divided PCLK)
11x = reserved
Reserved
[7]
Select source clock with CLKOUT0 pad
[6:4]
000 = MPLL INPUT Clock(XTAL)
001 = EPLL output
010 = FCLK(ARMCLK)
011 = HCLK
100 = PCLK
101 = DCLK0 (Divided PCLK)
110 = OSC To PLL INPUT Clock
111 = reserved
Description
Miscellaneous control register
Description
1: enable
1: enable
I/O PORTS
Reset Value
0xd0000020
Reset Value
1
1
0
1
000
0
0
0
0
0
0
000
0
010
11-33
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