Samsung S3C2451X User Manual page 480

HSMMC CONTROLLER
TRANSACTION CONTROL WITH DATA TRANSFER USING DAT LINE
Depending on whether DMA (optional) is used or not, there are two execution methods. The sequence not using
DMA is shown in Figure 21-11 and the sequence using DMA is shown in Figure 21-12.
In addition, the sequences for SD transfers are basically classified into following three kinds according to how the
number of blocks is specified :
1) Single Block Transfer:
The number of blocks is specified to the Host Controller before the transfer. The number of blocks specified is
always one.
2) Multiple Block Transfer:
The number of blocks is specified to the Host Controller before the transfer. The number of blocks specified shall
be one or more.
3) Infinite Block Transfer:
The number of blocks is not specified to the Host Controller before the transfer. This transfer is continued until an
abort transaction is executed. This abort transaction is performed by CMD12(Stop Command) in the case of a SD
memory card, and by CMD52(IO_RW_DIRECT) in the case of a SDIO card.
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
21-12
Specifications and information herein are subject to change without notice.
S3C2451X RISC MICROPROCESSOR