Samsung S3C2451X User Manual page 538

HSMMC CONTROLLER
ADMA System Address Register
This register contains the physical Descriptor address used for ADMA data transfer.
Register
ADMASYSADDR0
ADMASYSADDR1
Name Bit
SYSADAD
[31:0]
MA
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
21-70
Specifications and information herein are subject to change without notice.
Address
0X4AC00058
0X4A800058
ADMA System Address
This register holds byte address of executing command of the
Descriptor table.
32-bit Address Descriptor uses lower 32-bit of this register. At the
start of ADMA, the Host Driver shall set start address of the Descriptor
table. The ADMA increments this register address, which points to next
line, when every fetching a Descriptor line. When the ADMA Error
Interrupt is generated, this register shall hold valid Descriptor address
depending on the ADMA state. The Host Driver shall program
Descriptor Table on 32-bit boundary and set 32-bit boundary address
to this register. ADMA2 ignores lower 2-bit of this register and assumes
it to be 00b.
32-bit Address ADMA
Register Value
xxxxxxxx 00000000h
xxxxxxxx 00000004h
xxxxxxxx 00000008h
xxxxxxxx 0000000Ch
......
xxxxxxxx FFFFFFFCh
Note) The data length of the ADMA Descriptor Table should be the
word unit (multiple of the 4-byte).
R/W
R/W ADMA System Address Register (Channel 0)
R/W ADMA System Address Register (Channel 1)
Description
32-bit System Address
00000000h
00000004h
00000008h
0000000Ch
......
FFFFFFFCh
S3C2451X RISC MICROPROCESSOR
Description Reset Value
0x00
0x00
Initial Value
00