Samsung S3C2451X User Manual page 705

S3C2451 RISC MICROPROCESSOR
AC97 CODEC STATUS REGISTER (AC_CODEC_STAT)
If the Read enable bit is 1 and Codec command address is valid, Codec status data is also valid.
Register
AC_CODEC_STAT
AC_CODEC_STAT
-
Address
Data
NOTES: If you want to read data from AC97 codec register via the AC_CODDEC_STAT register, you should follow the steps.
1. Write command address and data on the AC_CODEC_CMD register with Bit[23] =1.
2. Have a delay time.
3. Read command address and data from AC_CODEC_STAT register.
AC97 PCM OUT/IN CHANNEL FIFO ADDRESS REGISTER (AC_PCMADDR)
To index the internal PCM FIFOs address.
Register
AC_PCMADDR 0x5B00001
AC_PCMADDR
-
Out read address
-
In read address
-
Out write address
-
In write address
Address
0x5B00000C
Bit
[31:23] Reserved.
[22:16] Codec status address
[15:0] Codec status data
Address R/W
R AC97 PCM Out/In Channel FIFO Address Register
0
Bit
[31:28] Reserved.
[27:24] PCM out channel FIFO read address
[23:20] Reserved.
[19:16] PCM in channel FIFO read address
[15:12] Reserved.
[11:8] PCM out channel FIFO write address
[7:4] Reserved.
[3:0] PCM in channel FIFO write address
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
R/W
R AC97 Codec Status Register
Description
Description
Description
Description
AC97 CONTROLLER
Reset Value
0x00000000
Initial State
0x00
0x00
0x0000
Reset Value
0x00000000
Initial State
0000
0000
0000
0000
0000
0000
0000
0000
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