Samsung S3C2451X User Manual page 721

S3C2451X RISC MICROPROCESSOR
PCM INTERRUPT STATUS REGISTER
The PCM_IRQ_STAT register is used to report IRQ status.
Register
PCM_IRQ_STAT0
PCM_IRQ_STAT1
The bit definitions for the PCM_IRQ_STATUS Register are described below:
PCM_IRQ_STATn
Reserved
IRQ_PENDING
TRANSFER_DONE
TXFIFO_EMPTY
TXFIFO_ALMOST
_EMPTY
TXFIFO_FULL
TXFIFO_ALMOST
_FULL
TXFIFO_ERROR
_STARVE
Address R/W
0x5C000014 R
0x5C000114 R
Bit
[31:14]
Reserved
[13]
Monitoring PCM IRQ.
1: PCM IRQ is occurred.
0: PCM IRQ is not occurred.
[12]
Interrupt is generated every time the serial shift for a word
completes
1: IRQ is occurred.
0: IRQ is not occurred.
[11]
Interrupt is generated whenever the TX FIFO is empty
1: IRQ is occurred.
0: IRQ is not occurred.
[10]
Interrupt is generated whenever the TxFIFO is ALMOST empty.
1: IRQ is occurred.
0: IRQ is not occurred.
[9]
Interrupt is generated whenever the TX FIFO is full
1: IRQ is occurred.
0: IRQ is not occurred.
[8]
Interrupt is generated whenever the TX FIFO is ALMOST full.
1: IRQ is occurred.
0: IRQ is not occurred.
[7]
Interrupt is generated for TX FIFO starve ERROR.
This occurs whenever the TX FIFO is read when it is still empty.
This is considered as an ERROR and will have unexpected
results
1: IRQ is occurred.
0: IRQ is not occurred.
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
PCM0 Interrupt Status
PCM1 Interrupt Status
Description
PCM AUDIO INTERFACE
Reset Value
0x00000000
0x00000000
Initial State
0
0
0
0
0
0
0
28-15