Samsung S3C2451X User Manual page 406

Risc microprocessor
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USB2.0 DEVICE
B. IN Transfer Operation Flow
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
17-34
Specifications and information herein are subject to change without notice.
AHB Master Registers( Unit Counter, Total Transfer Counter, Control)
are set in intial state or Interrupt service routine.
AHB Master Registers are to be set after MCU writes one packet data
to USB IN FIFO to operate a AHB Master operation after interrupt
service mode
USB Core receives IN TOKEN from Host PC and sends IN data to
HOST PC. If Host receives IN data successfully (Host send ACK
handshake), Master writes data to IN FIFO.
Master Controller writes to IN FIFO in USB Core from Memory.
NO
Total Transfer Counter in USB core is Zero?
AHB Master Operation is ended and Interrupt mode is On.
Figure 17-4. IN Transfer Operation Flow
S3C2451X RISC MICROPROCESSOR
YES

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