Samsung S3C2451X User Manual page 216

DMA CONTROLLER
DMA SPECIAL REGISTERS
There are 10 control registers for each DMA channel. (Since there are six channels, the total number of control
registers is 60.) Seven of them are to control the DMA transfer, and other three are to see the status of DMA
controller. The details of those registers are as follows.
DMA INITIAL SOURCE REGISTER (DISRC)
Register
DISRC0 0x4B000000
DISRC1 0x4B000100
DISRC2 0x4B000200
DISRC3 0x4B000300
DISRC4 0x4B000400
DISRC5 0x4B000500
DISRC6 0x4B000600
DISRC7 0x4B000700
DISRCn Bit
S_ADDR [30:0]
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
9-8
Specifications and information herein are subject to change without notice.
Address R/W
R/W DMA0 Initial Source Register
R/W DMA1 Initial Source Register
R/W DMA2 Initial Source Register
R/W DMA3 Initial Source Register
R/W DMA4 Initial Source Register
R/W DMA5 Initial Source Register
R/W DMA6 Initial Source Register
R/W DMA7 Initial Source Register
These bits are the base address (start address) of source data to
transfer. This value will be loaded into CURR_SRC only if the
CURR_SRC is 0 and the DMA ACK is 1.
S3C2451X RISC MICROPROCESSOR
Description
Description
Reset Value
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
Initial State
0x00000000