Samsung S3C2451X User Manual page 682

Risc microprocessor
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IIS MULTI AUDIO INTERFACE
The Data is aligned in the RX FIFO for 8-bits/channel or 16-bits/channel BLC as shown
31
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
26-12
Specifications and information herein are subject to change without notice.
BLC=00
BLC=01
23
RIGHT CHANNEL
Figure 26-6: RX FIFO Structure for BLC = 00 or BLC = 01
BLC=00
16
15
LEFT CHANNEL
S3C2451X RISC MICROPROCESSOR
BLC=01
7
0
LOC 0
LOC 1
LOC 2
LOC 3
LOC 4
LOC 5
LOC 6
LOC 7
LOC 8
LOC 9
LOC 10
LOC 11
LOC 12
LOC 13
LOC 14
LOC 15

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