Samsung S3C2451X User Manual page 469

Risc microprocessor
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S3C2451X RISC MICROPROCESSOR
21
This chapter describes the SD/SDIO/MMC/CE-ATA host controller and related registers supported by S3C2451X
RISC microprocessor.
OVERVIEW
The HSMMC (High-speed MMC) SDMMC is a combo host for Secure Digital card and MultiMedia Card. This host
is compatible for SD Association's (SDA) Host Standard Specification.
You can interface your system with SD card and MMC card. This performance of this host is very powerful, you
would get 50MHz clock rate and access 8-bit data pin simultaneously.
We provide 2 Channel HSMMC support.
CH0 only 4 bit data interface support.
FEATURES
-
SD Standard Host Spec(ver 2.0) compatible
-
SD Memory Card Spec(ver 2.0) / High Speed MMC Spec(4.2) compatible
-
SDIO Card Spec(Ver 1.0) compatible
-
512 bytes FIFO for data Tx/Rx
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48-bit Command Register
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136-bit Response Register
-
CPU Interface and DMA data transfer mode
-
1bit / 4bit / 8bit(Channel 1 only) mode switch support.
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Auto CMD12 support
-
Suspend / Resume support
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Read Wait operation support
-
Card Interrupt support
-
CE-ATA mode support
SD/MMC HOST CONTROLLER
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
HSMMC CONTROLLER
21-1

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