Samsung S3C2451X User Manual page 593

Risc microprocessor
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S3C2451X RISC MICROPROCESSOR
23
OVERVIEW
This specification defines the interface of camera. The CAMIF (Camera Interface) within the S3C2451X consists
of eight parts. They are the pattern mux, capturing unit, MSDMA (Memory Scaling DMA), preview scaler, codec
scaler, preview DMA, codec DMA, and SFR. The camera interface supports ITU R BT-601/656 YCbCr 8-bit
standard and Memory. Maximum input size is 4096x4096 pixels (2048x2048 pixels for scaling).Two scalers exist.
The one is the preview scaler, which is dedicated to generate smaller size image for preview. The other one is the
codec scaler, which is dedicated to generate codec useful image like plane type YCbCr 4:2:0 or 4:2:2. Two
master DMAs can do mirror and rotate the captured image for mobile environments. And test pattern generation
can be used to calibration of input sync signals as HREF, VSYNC. Also, video sync signals and pixel clock
polarity can be inverted in the camera interface side with using register setting.
Memory
CAMERA INTERFACE
ITU-R BT
601/656
YCbCr 4:2:X
MSDMA
CamIf
SFR
Figure 23-1. Camera interface overview
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Camera interface
T_patternMux
CatchCam
YCbCr 4:2:2
Preview Scaler
Pre-Scaler
Main-Scaler
Preview DMA
Flip
RGB 16/24-bit
AHB bus
CAMERA INTERFACE
YCbCr 4:2:X
Codec Scaler
Pre-Scaler
Main-Scaler
Codec DMA
Flip
Flip
RGB
YCbCr
4:2:X
16/24-bit
23-1

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