Samsung S3C2451X User Manual page 704

AC97 CONTROLLER
AC97 GLOBAL STATUS REGISTER (AC_GLBSTAT)
This is the status register. When the interrupt is occurred, you can check what the interrupt source is.
Register
AC_GLBSTAT
AC_GLBSTAT
-
Codec ready interrupt
PCM out channel underrun
interrupt
PCM in channel overrun
interrupt
MIC in channel overrun interrupt
PCM out channel threshold
interrupt
PCM in channel threshold
interrupt
MIC in channel threshold
interrupt
-
Controller main state
AC97 CODEC COMMAND REGISTER (AC_CODEC_CMD)
When you control writing or reading, you must set the Read enable bit, If you want to write data to the AC97
Codec, you set the index(or address) of the AC97 Codec and data.
Register
AC_CODEC_CMD
AC_CODEC_CMD
-
Read enable
Address
Data
When the commands are written on the AC_CODDEC_CMD register, It is recommended that the delay time between
Note:
the command and the next command is more than 1 / 48KHz.
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
27-14
Specifications and information herein are subject to change without notice.
Address R/W
0x5B000004 R
Bit
[31:23]
Reserved.
[22]
0 : Not requested
[21]
0 : Not requested
[20]
0 : Not requested
[19]
0 : Not requested
[18]
0 : Not requested
[17]
0 : Not requested
[16]
0 : Not requested
[15:3] Reserved.
000 : Idle
[2:0]
011 : Active
Address R/W
0x5B000008 R/W
Bit
[31:24] Reserved
[23] 0 : Command write
[22:16] Codec command address
[15:0] Codec command data
S3C2451 RISC MICROPROCESSOR
Description
AC97 Global Status Register
Description
1 : Requested
1 : Requested
1 : Requested
1 : Requested
1 : Requested
1 : Requested
1 : Requested
001 : Init 010 : Ready
100 : LP 101 : Warm
Description
AC97 Codec Command Register
Description
1 : Status read
(1)
Reset Value
0x00000001
Initial State
0x00
0
0
0
0
0
0
0
0x000
001
Reset Value
0x00000000
Initial State
0x00
0
0x00
0x0000