Samsung S3C2451X User Manual page 171

S3C2451X RISC MICROPROCESSOR
When ECCType is 4-bit ECC.
NFECCERR0
ECC Busy
ECC Ready
Free Page
4-bit MECC Error
nd
2 Bit Error Location
Reserved
st
1 Bit Error Location
NOTE: These values are updated when ECCDecDone (NFSTAT[6]) is set ('1').
NFECCERR1
Reserved
th
4 Bit Error Location
Reserved
rd
3 Bit Error Location
NOTE: These values are updated when ECCDecDone (NFSTAT[6]) is set ('1').
Bit
[31] Indicates the 4-bit ECC decoding engine is searching
whether a error exists or not
0: Idle
[30] ECC Ready bit
[29] Inidicates the page data red from NAND flash has all 'FF'
value.
[28:26] 4-bit ECC decoding result
000: No error
010: 2-bit error
100: 4-bit error
11x: reserved
Note : If it happens that there are more errors than 4 bits,
4-bit ECC module does not ensure right detection.
[25:16] Error byte location of 2
[15:10] Reserved
[9:0] Error byte location of 1
Bit
[31:26] Reserved
[25:16] Error byte location of 4
[15:10] Reserved
[9:0] Error byte location of 3
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
1: Busy
001: 1-bit error
011: 3-bit error
101: Uncorrectable
nd
bit error
st
bit error
Description
th
bit error
rd
bit error
NAND FLASH CONTROLLER
Initial State
0
1
0
000
0x00
0x00
Initial State
0x00
0x00
0x00
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