Samsung S3C2451X User Manual page 716

PCM AUDIO INTERFACE
The PCM Tx FIFO REGISTER
Register
PCM_TXFIFO0
PCM_TXFIFO1
The bit definitions for the PCM_TXFIFO Register are shown below:
PCM_TXFIFOn
Reserved
TXFIFO_DVALID
TXFIFO_DATA
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
28-10
Specifications and information herein are subject to change without notice.
Address R/W
0x5C000008 R/W
0x5C000108 R/W
Bit
[31:17] Reserved
[16] TXFIFO data is valid
Write: don't care
Read: TXFIFO read data valid
1: valid
0: invalid (probably read an empty fifo)
[15:0] Write: Write PCM data to TXFIFO
NOTE: the TXFIFO is read by the PCM serial shift engine
Read: Read PCM data from TXFIFO for supporting debug
TXFIFO
Description
PCM0 interface Transmit FIFO data
register
PCM1 interface Transmit FIFO data
register
Description
S3C2451X RISC MICROPROCESSOR
Reset Value
0x00010000
0x00010000
Initial
State
1
0