Samsung S3C2451X User Manual page 606

CAMERA INTERFACE
SOFTWARE INTERFACE
CAMIF SFR (Special Function Register)
CAMERA INTERFACE SPECIAL REGISTERS
•
When preview input use MSDMA path, the first column mark (v) sfr will be related to the preview operation.
•
The last column means that each value can change by each VSYNC start during capture enable.
(O : change , X : not change)
SOURCE FORMAT REGISTER
Register
CISRCFMT 0x4D80_0000
CISRCFMT Bit
[31]
ITU601_656n
[30]
UVOffset
In16bit [29]
[28:16]
SourceHsize
[15:14]
Order422
Reserved [13]
[12:0]
SourceVsize
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
23-14
Specifications and information herein are subject to change without notice.
Address R/W
RW
1 : ITU-R BT.601 YCbCr 8-bit mode enable
0 : ITU-R BT.656 YCbCr 8-bit mode enable
Cb,Cr value offset control.
1 : +128
0 : +0 (normally used)
This bit must be 0.
Source horizontal pixel number (must be 8's multiple)
(Also, must be 4's multiple of PreHorRatio if WinOfsEn is 0)
Input YCbCr order inform for input 8-bit mode
8-bit mode
00 : YCbYCr
01 : YCrYCb
10 : CbYCrY
11 : CrYCbY
Source vertical pixel number.
(Also, must be multiple of PreVerRatio when scale down if
WinOfsEn is 0)
Description
Source format register
Description
S3C2451X RISC MICROPROCESSOR
Reset Value
Initial
State
0
0
0
0
0
0
0
0
Change
State
X
X
X
X
X
X
X