Samsung S3C2451X User Manual page 379

Risc microprocessor
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S3C2451X RISC MICROPROCESSOR
ENDPOINT INTERRUPT REGISTER (EIR)
The endpoint interrupt register lets the MCU knows what endpoint generates the interrupt. The source of an
interrupt could be various, but, when an interrupt is detected, the endpoint status register should be checked to
identify if it's related to specific endpoint. Clearing the bits can be accomplished by writing "1" to the bit position
where the interrupt is detected.
Register
EIR
0x4980_0004
EIR
Bit
[31:9]
EP8I
[8]
EP7I
[7]
EP6I
[6]
EP5I
[5]
EP4I
[4]
EP3I
[3]
EP2I
[2]
EP1I
[1]
EP0I
[0]
Address
R/W
R/C
Endpoint Interrupt Register
R/W
Reserved
R/C
Endpoint 8 Interrupt Flag
R/C
Endpoint 7 Interrupt Flag
R/C
Endpoint 6 Interrupt Flag
R/C
Endpoint 5 Interrupt Flag
R/C
Endpoint 4 Interrupt Flag
R/C
Endpoint 3 Interrupt Flag
R/C
Endpoint 2 Interrupt Flag
R/C
Endpoint 1 Interrupt Flag
R/C
Endpoint 0 Interrupt Flag
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
Description
USB2.0 DEVICE
Reset Value
0x00
Initial State
0
0
0
0
0
0
0
0
0
0
17-7

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