Samsung S3C2451X User Manual page 617

S3C2451X RISC MICROPROCESSOR
CODEC DMA CONTROL REGISTER
Register
CICOCTRL 0x4D80_004C
CICOCTRL Bit
Reserved [31:24]
[23:19]
Yburst1_Co
[18:14]
Yburst2_Co
Cburst1_Co [13:9]
Cburst2_Co [8:4]
Reserved
LastIRQEn_Co
[1:0]
Order422_Co
•
Interleaved burst length
Y burst length
C burst length (C burst length = Y burst length / 2)
Wanted burst length ( = Y + 2C )
NOTE: When Codec output format is YCbCr 4:2:2 interleave ,ScalerBypass_Co = 0 and ScaleUp_V_Co = 1 , Wanted main
burst length = 16 and Wanted remained burst length ≠ 16 is not allowed.
Address R/W
RW
Output format : YCbCr
frames
Output format : RGB
Output format : YCbCr
frames
Output format : RGB
frame
Main burst length for codec Cb/Cr frames
Remained burst length for codec Cb/Cr frames
[3]
[2] 1 : enable last IRQ at the end of frame capture (It is
recommended to check the done signal of capturing image
for JPEG. One pulse)
0 : normal
Interleaved YCbCr 4:2:2 output order memory storing style
LSB
00 Y
0
01 Y
0
10 Cb
11 Cr
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
Codec DMA control related
Description
Main burst length for codec Y
Main burst length for RGB frame
Remained burst length for codec Y
Remained burst length for RGB
MSB
Cb Y Cr
0 1 0
Cr Y Cb
0 1 0
Y Cr Y
0 0 0 1
Y Cb Y
0 0 0 1
2 , 4 , 8
1 , 2 , 4
4 , 8 , 16
CAMERA INTERFACE
Reset Value
0
Initial Change
State State
0 X
0 X
0 X
0 X
0 X
0 X
0 X
0 X
23-25