Samsung S3C2451X User Manual page 366

UART
UART TRANSMIT BUFFER REGISTER (HOLDING REGISTER & FIFO REGISTER)
There are four UART transmit buffer registers including UTXH0, UTXH1, UTXH2 and UTXH3 in the UART block.
UTXHn has an 8-bit data for transmission data.
Register
UTXH0
UTXH1
UTXH2
UTXH3 0x5000C020
UTXHn
TXDATAn
UART RECEIVE BUFFER REGISTER (HOLDING REGISTER & FIFO REGISTER)
There are four UART receive buffer registers including URXH0, URXH1, URXH2 and URXH3 in the UART block.
URXHn has an 8-bit data for received data.
Register
URXH0
URXH1
URXH2
URXH3 0x5000C024
URXHn
RXDATAn
NOTE: When an overrun error occurs, the URXHn must be read. If not, the next received data will also make an overrun
hough the overrun bit of UERSTATn had been cleared.
error, even t
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
15-18
Specifications and information herein are subject to change without notice.
Address R/W
0x50000020 W
(by byte)
0x50004020 W
(by byte)
0x50008020 W
(by byte)
W
(by byte)
Bit
[7:0] Transmit data for UARTn
Address R/W
0x50000024 R
(by byte)
0x50004024 R
(by byte)
0x50008024 R
(by byte)
R
(by byte)
Bit
[7:0] Receive data for UARTn
Description
UART channel 0 transmit buffer register
UART channel 1 transmit buffer register
UART channel 2 transmit buffer register
UART channel 3 transmit buffer register
Description
Description
UART channel 0 receive buffer register
UART channel 1 receive buffer register
UART channel 2 receive buffer register
UART channel 3 receive buffer register
Description
S3C2451 RISC MICROPROCESSOR
Reset Value
Initial State
Reset Value
Initial State
–
–
–
–
–
–
–
–
–
–