Samsung S3C2451X User Manual page 161

S3C2451X RISC MICROPROCESSOR
7.13.2 NAND FLASH CONFIGURATION REGISTER
Register Address
NFCONF 0x4E000000
NFCONF
Reserved [31]
Reserved [30]
Reserved [29:26]
MsgLength [25]
ECCType [24:23]
Reserved [22:15]
TACLS [14:12]
Reserved [11]
TWRPH0 [10:8]
Reserved
TWRPH1 [6:4]
PageSize
PageSize_Ext
R/W
R/W NAND Flash Configuration register
Bit
Reserved
Should be 0
Reserved
Message (Data) length for 4/8 bit ECC
0: 512-byte
This bit indicates what kind of ECC should be used.
00: 1-bit ECC
10: 4-bit ECC
01 : 8-bit ECC
Note. Don't confuse the value of 4-bit ECC and 8-bit
ECC.
Reserved
CLE & ALE duration setting value (0~7)
Duration = HCLK x TACLS
Reserved
TWRPH0 duration setting value (0~7)
Duration = HCLK x ( TWRPH0 + 1 )
[7]
Reserved
TWRPH1 duration setting value (0~7)
Duration = HCLK x ( TWRPH1 + 1 )
[3]
This bit indicates the page size of NAND Flash Memory
When PageSize_Ext is 1, the value of PageSize means
following:
0: 512 Bytes/page,
When PageSize_Ext is 0, the value of PageSize means
following:
0: 2048 Bytes/page,
[2] This bit indicated what kind of NAND Flash memory is used.
0: Large Size NAND Flash
1: Small Size NAND Flash
This bit is determined by OM[2] pin status on reset and
wake-up time from sleep mode.
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
Description
1: 24-byte
1: 2048 Bytes/page
1: 4096 Bytes/page
NAND FLASH CONTROLLER
Reset Value
0xX000100X
Initial State
0
0
0000
0
H/W Set
(CfgBootEcc)
000000000
001
0
000
0
000
H/W Set
(CfgAdvFlash)
1
7-13