Samsung S3C2451X User Manual page 92

SYSTEM CONTROLLER
The CLKDIV0 configures the division ratio of each clock generator. The operating speed of ARM can be slow to
reduce the overall power dissipation, if software doest not require full operating performance. In this case, the
power dissipation due to the ARM core can be reduced if the DVS field is ON. The set of DVS field makes that the
operating frequency of ARM is the same as system operating clock (HCLK).
CLKDIV0
RESERVED
DVS
RESERVED
ARMDIV
EXTDIV
PREDIV
HALFHCLK
PCLKDIV
HCLKDIV
ARMCLK Ratio = (ARMDIV+1).
HCLK Ratio = (PREDIV+1) * (HCLKDIV + 1)
Restrictions about changing ARMDIV register.
1. Be careful that ARMCLK should be equal or faster than HCLK. ( X times, X is integer)
2. Change PREDIV, HCLKDIV field after 12 HCLK periods as soon as nRESET is released.
Basically, Changing ARMDIV and HCLKDIV simultaneously is supported. When modifying ARMDIV, PREDIV and
HCLKDIV, User should pay attention to obey upper No 1 restriction.
Preliminary product information describe products that are in development,
2-26
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Bit
[31:14] -
Enable/disable DVS (Dynamic Voltage Scaling) feature
0 = disable
[13]
1 = enable (The frequency of ARMCLK is the same frequency
of HCLK regardless of ARMDIV field.)
[12] -
ARM clock divider ratio
ARMDIV values are recommended as below.
1/1 = 3'b000
1/2 = 3'b001
[11:9]
1/3 = 3'b010
1/4 = 3'b011
1/6 = 3'b101
1/8 = 3'b111
External clock divider ratio
[8:6]
ratio = (MPLL reference clock) / (EXTDIV*2 + 1)
Pre Divider for HCLK
PREDIV value should be one of 0,1,2,3
[5:4]
Output frequency of PREDIVIDER should be less than 266MHz
HCLKx1_2(SSMC) clock divider ratio, 0 = HCLK, 1 = HCLK/2
[3]
User also have to configure SSMC's special register which
related with half clock.
[2] PCLK clock divider ratio, 0 = HCLK, 1 = HCLK / 2
HCLK clock divider ratio
[1:0]
HCLKDIV value should be one of 0,1,3. (2'b10 is invalid)
S3C2451X RISC MICROPROCESSOR
Description Initial Value
0x0
0
0
0x0
0
0
1
1
0x0