Samsung S3C2451X User Manual page 33

Risc microprocessor
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S3C2451X RISC MICROPROCESSOR
Signal
SDRAM I/F
SADDR[15:0]
SDATA[31:0]
nSRAS
nSCAS
nSWE
nSCS[1:0]
DQM[3:0]
DQS[1:0]
SCLK
nSCLK
SCKE
NAND Flash
FCLE
FALE
nFCE
nFRE
nFWE
FRnB
SMC/OneNAND
RSMCLK
RSMVAD
RSMBWAIT
CF I/F
nOE_CF
nWE_CF
nIREQ_CF
nINPACK_CF
CardPWR_CF
nREG_CF
RESET_CF
LCD Control Unit
RGB_VD/SYS_VD
[23:0]
RGB_VCLK/SYS_
WR
In/Out
current bus cycle cannot be completed. If nWAIT signal isn't used in your
system, nWAIT signal must be tied on pull-up resistor.
O
SDRAM Address bus
IO
SDRAM Data Bus
O
SDRAM row address strobe
O
SDRAM column address strobe
O
SDRAM write enable
O
SDRAM chip select
O
SDRAM data mask
O
mDDR/DDR2 Data Strobe
O
SDRAM clock
O
mDDR/DDR2 Conversion clock
O
SDRAM clock enable
O
Command latch enable
O
Address latch enable
O
Nand flash chip enable
O
Nand flash read enable
O
Nand flash write enable
I
Nand flash ready/busy
I/O
SMC Clock
O
SMC Address Valid
O
SMC Burst Wait
O
CF Output Enable Strobe
O
CF Write Enable Strobe
I
Interrupt request from CF card
I
Input acknowledge in I/O mode
O
Card Power Enable
O
Register in CF card strobe
O
CF card reset
RGB I/F Video Data: RGB_VD[23:0]
O
i80 I/F Video DataSYS_VD[17:0]
RGB I/F LCD Clock
O
i80 I/F Write Enable
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
PRODUCT OVERVIEW
1-29

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