Samsung S3C2451X User Manual page 614

Risc microprocessor
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CAMERA INTERFACE
CR2 START ADDRESS REGISTER
Register
CICOCRSA2
0x4D80_003C
CICOCRSA2
Bit
CICOCRSA2
[31:0]
CR3 START ADDRESS REGISTER
Register
CICOCRSA3
0x4D80_0040
CICOCRSA3
Bit
CICOCRSA3
[31:0]
CR4 START ADDRESS REGISTER
Register
CICOCRSA4
0x4D80_0044
CICOCRSA4
Bit
CICOCRSA4
[31:0]
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
23-22
Specifications and information herein are subject to change without notice.
Address
R/W
RW
nd
Cr 2
frame start address for codec DMA
Address
R/W
RW
rd
Cr 3
frame start address for codec DMA
Address
R/W
RW
th
Cr 4
frame start address for codec DMA
Description
nd
Cr 2
frame start address for codec DMA
Description
Description
rd
Cr 3
frame start address for codec DMA
Description
Description
th
Cr 4
frame start address for codec DMA
Description
S3C2451X RISC MICROPROCESSOR
Reset Value
Initial
State
0
Reset Value
Initial
State
0
Reset Value
Initial
State
0
0
Change
State
X
0
Change
State
X
0
Change
State
X

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