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S3C2451
RISC MICROPROCESSOR
cnt15
Q1N
RTC clock
(32. 768KHz)
Example) For 1 ms Tick interrupt generation.
st
1
)
RTCCON[0]= 1'b1 ( RTC enable )
nd
2
)
RTCCON[3]=1'b1 ( RTC clock counter reset).
rd
3
)
RTCCON[3] = 1'b0 ( RTC clock counter enable)
th
4
)
RTCCON[8:5] = 4'b0011 ( RTC divide clock selection.)
th
5
)
TICNT1[6:0] = 7'h1 (Tick counter value setting).
th
6
)
TICNT0[7] = 1'b1 (Tick counter enable).
Q8N
2. 048KHz
TICCNT2[16:0]
Tick time interrupt
enable (1bit)
Figure 14-2. RTC tick interrupt clock scheme
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Q15N
RTCCON [8:5]
0
Counter
1
RTCCON [4]
TICK TIME COUNT REGISTER
TICCNT0[6:0] TICCNT1[7:0]
rtcif
Tick
interrupt
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Real Time Clock
14-5
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