Samsung S3C2451X User Manual page 166

NAND FLASH CONTROLLER
7.13.7 MAIN DATA AREA ECC REGISTER
Register Address
NFMECCD0 0x4E000014
NFMECCD1 0x4E000018
NFMECCD0
Reserved
ECCData1
Reserved
ECCData0
NOTE: Only word access is valid.
NFMECCD1
Reserved
ECCData3
Reserved
ECCData2
7.13.8 SPARE AREA ECC REGISTER
Register Address
NFSECCD 0x4E00001C
NFSECCD
Reserved [31:24]
SECCData1 [23:16]
Reserved
SECCData0
NOTE: Only word or half word access is valid.
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
7-18
Specifications and information herein are subject to change without notice.
R/W
R/W NAND Flash ECC 1
(Note) Refer to ECC MODULE FEATURES.
R/W NAND Flash ECC 3
(Note) Refer to ECC MODULE FEATURES.
Bit
[31:24] Not used
[23:16] ECC1 for I/O[7:0]
[15:8] Not used
[7:0] ECC0 for I/O[7:0]
Bit
[31:24] Not used
[23:16] ECC3 for I/O[7:0]
[15:8] Not used
[7:0] ECC2 for I/O[7:0]
R/W
R/W NAND Flash ECC(Error Correction Code) register for spare
area data read
Bit
Not used
nd
2 Spare area ECC for I/O[7:0]
[15:8] Not used
st
[7:0] 1 Spare area ECC for I/O[ 7:0]
S3C2451X RISC MICROPROCESSOR
Description
st nd
2 register for main area data read
rd th
4 register for main area data read
Description
Description
Description
Description
Reset Value
0x00000000
0x00000000
Initial State
0x00
0x00
0x00
0x00
Initial State
0x00
0x00
0x00
0x00
Reset Value
0x00000000
Initial State
0x00
0x00
0x00
0x00