Samsung S3C2451X User Manual page 56

Risc microprocessor
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PRODUCT OVERVIEW
Register Name
IICDS0
IICLC0
IICCON1
IICSTAT1
IICADD1
IICDS1
IICLC1
IIS Multi Audio Interface
IISCON
IISMOD
I2SFIC
I2SPSR
I2STXD
I2SRXD
IIS
IISCON
IISMOD
I2SFIC
I2SPSR
I2STXD
I2SRXD
I/O port
GPACON
GPADAT
GPBCON
GPBDAT
GPBUDP
GPBSEL
GPCCON
GPCDAT
GPCUDP
GPDCON
GPDDAT
GPDUDP
GPECON
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
1-52
Specifications and information herein are subject to change without notice.
Address
Reset Value
0x5400000C
0x54000010
0x54000100
0x54000104
0x54000108
0x5400010C
0x54000110
0x55000000
0xC600
0x55000004
0x55000008
0x5500000C
0x55000010
0x55000014
0x55000100
0x600
0x55000104
0x55000108
0x5500010C
0x55000110
0x55000114
0x56000000
0xFFFFFF
0x56000004
0x56000010
0x56000014
0x56000018
0x00155555
0x5600001c
0x56000020
0x56000024
0x56000028
0x55555555
0x56000030
0x56000034
0x56000038
0x55555555
0x56000040
Acc.
Read/
Unit
Write
W
R/W
W
R/W
0x0
0x0
0x0
0x0
W
0x0
W
R/W
0x0
0x0
0x0
0x0
W
0x0
W
R/W
0x0
W
R/W
0x0
W
R/W
0x0
W
R/W
W
R/W
0x1
W
R/W
0x0
W
R/W
0x0
W
R/W
W
R/W
0x0
W
R/W
0x0
W
R/W
W
R/W
0x0
W
R/W
S3C2451X RISC MICROPROCESSOR
Function
IIC0 data shift
IIC0 multi-master line control
IIC1 control
IIC1 status
IIC1 address
IIC1 data shift
IIC1multi-master line control
IIS control
IIS mode
I2S interface FIFO control register
I2S interface clock divider control
register
I2S interface transmit data register
R
I2S interface receive data register
IIS control
IIS mode
I2S interface FIFO control register
I2S interface clock divider control
register
I2S interface transmit data register
R
I2S interface receive data register
Port A control
Port A data
Port B control
Port B data
Pull-up/down control B
Selects the function of port B
Port C control
Port C data
Pull-up/down control C
Port D control
Port D data
Pull-up/down control D
Port E control

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