Samsung S3C2451X User Manual page 578

Risc microprocessor
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LCD CONTROLLER
Window 0 Control Register (Continued)
WINCON0
Reserved
ENWIN_F
Window 1 Control Register
Register
WINCON1
0x4C800018
WINCON1
BITSWP
BYTSWP
HAWSWP
-
[15:11]
BURSTLEN
[10:9]
Reserved
BLD_PIX
BPPMODE_F
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
22-38
Specifications and information herein are subject to change without notice.
Bit
[1]
Reserved
[0]
Window0 on/ off control
0 = Off window0.
1 = On window0.
Address
R/W
R/W
Window control 1 register
Bit
[18]
Bit swap control
0 = Swap Disable
[17]
Byte swaps control
0 = Swap Disable
[16]
Half-Word swap control
0 = Swap Disable
Reserved
DMA's Burst Length selection :
00 : 16 word– burst
10 : 4 word– burst
[8:7]
Reserved
[6]
Select blending category
0 = Per plane blending
[5:2]
Select the BPP (Bits Per Pixel) mode Window image.
0000 = 1bpp ( palletized )
0001 = 2bpp ( palletized )
0010 = 4bpp ( palletized )
0011 = 8bpp ( palletized )
0100 = 8bpp ( non-palletized, A: 1-R:2-G:3-B:2 )
0101 = 16bpp ( non-palletized, R:5-G:6-B:5 )
0110 = 16bpp ( non-palletized, A:1-R:5-G:5-B:5 )
0111 = 16bpp ( non-palletized, I :1-R:5-G:5-B:5 )
1000 = Unpacked 18bpp ( non-palletized, R:6-G:6-B:6 )
1001 = Unpacked 18bpp ( non-palletized, A:1-R:6-G:6-B:5 )
1010 = Unpacked 19bpp ( non-palletized, A:1-R:6-G:6-B:6 )
1011 = Unpacked 24bpp ( non-palletized, R:8-G:8-B:8 )
1100 = Unpacked 24bpp ( non-palletized, A:1-R:8-G:8-B:7 )
1101 = Unpacked 25bpp ( non-palletized, A:1-R:8-G:8-B:8 ) or
Unpacked 28bpp ( non-palletized, A:4-R:8-G:8-B:8 )
111x = Reserved
Note. 1101 = support 28bpp (non-palletized A:4-R:8-G:8-B:8 ) for
per pixel blending.
Description
Description
Description
1 = Swap Enable
1 = Swap Enable
1 = Swap Enable
01 : 8 word– burst
11 : Reserved
1 = Per pixel blending
S3C2451X RISC MICROPROCESSOR
Initial State
Reset Value
0x0000_0000
Initial State
0
0
0
0
0
0
0
0
0
0

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