Samsung S3C2451X User Manual page 531

Risc microprocessor
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S3C2451X RISC MICROPROCESSOR
CONTROL REGISTER 3
Register
CONTROL3_0
CONTROL3_1
Name
Bit
FCSEL3
[31]
Feedback Clock Select [3]
Reference Note (1)
FIA3
[30:24] FIFO Interrupt Address register 3
FIFO (512Byte Buffer memory, word address unit)
Initial value (0x7F) generates at 512-byte (128-word) position.
FCSEL2
[23]
Feedback Clock Select [2]
Reference Note (1)
FIA2
[22:16] FIFO Interrupt Address register 2
FIFO (512Byte Buffer memory, word address unit)
Initial value (0x5F) generates at 384-byte (96-word) position.
FCSEL1
[15]
Feedback Clock Select [1]
Reference Note (2)
FIA1
[14:8]
FIFO Interrupt Address register 1
FIFO (512Byte Buffer memory, word address unit)
Initial value (0x3F) generates at 256-byte (64-word) position.
FCSEL0
[7]
Feedback Clock Select [0]
Reference Note (2)
FIA0
[6:0]
FIFO Interrupt Address register 0
FIFO (512Byte Buffer memory, word address unit)
Initial value (0x1F) generates at 128-byte (32-word) position.
Note (1) : FCSel[3:2] : Tx Feedback Clock Delay Control
'01'=Delay1 (less delay), '11'=Delay2, '00'=Delay3, '10'=Delay4 (more delay)
Note (2) : FCSel[1:0] : Rx Feedback Clock Delay Control
'00'=Delay1 (less delay), '01'=Delay2, '10'=Delay3, '11'=Delay4 (more delay)
Address
R/W
0X4AC00084
R/W
0X4A800084
R/W
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
FIFO Interrupt Control (Control Register 3)
(Channel 0)
FIFO Interrupt Control (Control Register 3)
(Channel 1)
Description
HSMMC CONTROLLER
Reset Value
0x7F5F3F1F
0x7F5F3F1F
Initial Value
0x0
0x7F
0x0
0x5F
0x0
0x3F
0x0
0x1F
21-63

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