Ata_Command - Samsung S3C2451X User Manual

Risc microprocessor
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S3C2451X RISC MICROPROCESSOR
ATA_COMMAND REGISTER
Register

ATA_COMMAND

0x4B801908
ATA_COMMAND
Reserved
xfr_command
The STOP command is a thing, which use when CPU wants to pause upon data transfer. When the CPU wants to
judge the transmission data is valid or not while transfer transmits, for a moment.
To send data continually, give a CONTINUE command to do data transmission continuously.
The STOP command does control ATA Device side signal but does not control DMA side. Namely, if the FIFO
has data after STOP command, DMA operation progresses until the FIFO has empty at read operation. In case of
write operation, the DMA acts the same way until the FIFO has full.
The ABORT command uses when the transmitting data has proved useless data or discontinues absurd state by
error interrupt from device.
At that time, all data in ATA Host controller (register, FIFO) cleared and the transmission state machine goes to
IDLE.
The Software Reset's meaning become clear all registers even though the ABORT command had been executed
before do configuration register set for next transmission. But it is not mandatory.
Address
R/W
R/W
Bits
[31:2]
Reserved bits
[1:0]
ATA transfer command
Four command types (START, STOP, ABORT and
CONTINUE) are supported for data transfer control. The
"START" command is used to start data transfer. The
"STOP" command can pause transfer temporarily. The
"CONTINUE" command shall be used after "STOP"
command or internal state of "pause" when track buffer
is full. The "ABORT" command terminated current data
transfer sequences and make ATA host controller move
to idle state.
00 : command stop
01 : command start (Only available in idle state)
10 : command abort
11 : command continue (Only available in transfer
pause)
** After CPU commands ABORT, make a software reset
by ATA_SWRST to clear the leftover values of internal
registers.
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
ATA Command register
Description
CF CONTROLLER
Reset Value
0x0000_0000
R/W
Reset Value
R
0x0
R/W
0x0
8-17

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