Samsung S3C2451X User Manual page 579

S3C2451X RISC MICROPROCESSOR
Window 1 Control Register (Continued)
WINCON1
ALPHA_SEL
ENWIN_F
Window 0 Position Control A Register
Register
VIDOSD0A 0x4C800028
VIDOSD0A
OSD_LeftTopX_F
OSD_LeftTopY_F
Window 0 Position Control B Register
Register
VIDOSD0B 0x4C80002C
VIDOSD0B
OSD_RightBotX_F
OSD_RightBotY_F
NOTE: Registers must have word boundary X position.
So, 24bpp mode should have X position by 1 pixel. ( ex, X = 0,1,2,3....)
16bpp mode should have X position by 2 pixel. ( ex, X = 0,2,4,6....)
8bpp mode should have X position by 4 pixel. ( ex, X = 0,4,8,12....)
Bit
[1] Alpha value selection
Per plane blending case( BLD_PIX ==0)
0 = using ALPHA0_R/G/B values
1 = using ALPHA1_R/G/B values
Per pixel blending case( BLD_PIX ==1)
0 = selected by AEN bit in frame buffer for each pixel or Key area
KEYBLEND
(W1KEYCON0[26])
1 = using DATA[27:24] in frame buffer, only for 28bpp mode
Window1 on/ off control
[0]
0 = Off window1
1 = On window1
Address R/W
R/W Video Window 0's position control register
Bit
[21:11] Horizontal screen coordinate for left top pixel of OSD image
[10:0] Vertical screen coordinate for left top pixel of OSD image
Address R/W
R/W Video Window 0's position control register
Bit
[21:11] Horizontal screen coordinate for right bottom pixel of OSD
image
[10:0] Vertical screen coordinate for right bottom pixel of OSD image
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
AEN = 0 ALPHA0_R/G/B
0
AEN = 1 ALPHA1_R/G/B
Non-Key area ALPHA0_R/G/B
1
Key area ALPHA1_R/G/B
Description
Description
Description
Description
LCD CONTROLLER
Initial State
0
0
Reset Value
0x0000_0000
initial state
0
0
Reset Value
0x0000_0000
initial state
0
0
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