Samsung S3C2451X User Manual page 423

Risc microprocessor
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S3C2451X RISC MICROPROCESSOR
YUV422
2-Planar
COMMAND FIFO
2D has a 32-word command FIFO. Every data written to command registers and parameter setting registers will
be written to the FIFO first. If the graphics engine is idle (no command is being executed), the data will be written
to the designated register in one cycle; otherwise, the data will be stored in the FIFO and wait to be dispatched
after the current rendering process completes.
It is user's responsibility to make sure that the data written to the FIFO do not exceed its maximum capacity. User
can monitor the number of data entries used in FIFO by reading FIFO_USED bits in FIFO_STAT_REG, or ask
graphics engine to give an interrupt signal when the number of entries in FIFO reaches a certain level by setting
FIFO_INTC_REG and E bit in INTEN_REG.
RENDERING PIPELINE
The rendering pipeline of 2D is illustrated in Figure 19-3. The functionality and related registers of each stage are
introduced in detail in the rest of this chapter.
PRIMITIVE DRAWING
Primitive Drawing determines the pixels to fill, and pass their coordinates to the next stage for further operations.
2D supports three types of primitive drawing: 1) line/point drawing; 2) bit block transfer; 3) color expansion.
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Figure 19-2. YUV 2-Planar Format
Figure 19-3. 2D Rendering Pipeline
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
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2D
19-3

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